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TI ADC3 Convertors

Texas Instruments' ADC3 High Speed Analog to Digital Converters

The ADC3xxx delivers the industry’s lowest power family of 12-bit, 14-bit, JESD204B, LVDS, both dual and quad ADCs ranging from 25-160MSPS. The scalability of the family from low speeds in the <25MSPS range to 160MSPS makes it ideal for a broad array of applications from motor control, general purpose data acquisition and broad industrial solutions to high performance, low power software defined radios, munitions guidance and high density communications and radar gear.​​

The ADC3xxx Supports speed ranges up to 160MSPS in 32 device options for industrial (motor control, general purpose data acquisition), defense (SDR, munitions guidance, portable spectrum analysis, AESA radar), and communications applications such as multicarrier, multimode cellular receivers and communications test equipment.

ADC3xxx  Consumes lower power than previous generation of ADCs at these sampling nodes and resolution by nearly 28mW/ch in the lower sampling node, and about 300mW/ch at the fastest node with JESD interface.

Features:

  • Quad Channel
  • Single 1.8-V Supply
  • Flexible Input Clock Buffer with Divide-by-1, -2, -4
  • fIN = 70 MHz
  • Ultra-Low Power Consumption
  • Channel Isolation: 105 dB
  • Internal Dither
  • JESD204B Serial Interface
  • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
  • Supports One Lane per ADC up to 160 MSPS
  • Support for Multi-Chip Synchronization
  • Package: VQFN-48 (7 mm × 7 mm)

Applications:

  • Industrial Automation
  • Motor Control Feedback
  • Optical Sensing and OTDR
  • Portable Test & Measurement
  • Wireless Communications: Civilian and Government
  • General Purpose Wireless

ADC32J22IRGZT - See ADC32J22IRGZT Details

Features

  • 12-Bit Resolution
  • SNR = 70.3 dBFS, SFDR = 88 dBc at fIN = 70 MHz
  • Ultralow Power Consumption:
    • 227 mW/Ch at 160 MSPS
  • JESD204B Serial Interface:
    • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
  • Pin-to-Pin Compatible with 14-Bit Version (ADC32J4X)

Evaluation Module:

The ADC32J22 EVM demonstrates the performance of a low power dual 50Msps 12 bit ADC.  It includes the ADC32J22 device, an optional DC-coupled THS4541 active interface signal path, JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary voltages.  The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single ended signal source.  If a DC coupled path is desired an optional path is provided using the THS4541.  This can be selected by moving some solder jumpers.  The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source.  An onboard LMK04828 can be used to generate the necessary JESD204B clocks

Evaluation Module Features:

  • Single 1.8V supply to simplify power requirements
  • Flexible input clock buffer with 1/2/4 divider to simplify clocking
  • On chip dither to improve SFDR
  • JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
  • Supports subclasses 0, 1, 2 for synchronization and compatibility
  • Pin compatibility with 12/14b and dual/quad devices

ADC32J45IRGZ25 - See ADC32J45IRGZ25 Details

Features

  • 14-Bit Resolution
  • SNR = 72.2 dBFS, SFDR = 87 dBc at fIN = 70 MHz
  • Ultralow Power Consumption:
    • 227 mW/Ch at 160 MSPS
  • JESD204B Serial Interface:
    • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
  • Pin-to-Pin Compatible with 12-Bit Version (ADC32J2X) 

Evaluation Module:

The ADC32J45 EVM demonstrates the performance of a low power dual 160Msps 14 bit ADC. It includes the ADC32J45 device, LMK04828 JESD204B clocking solution and TI voltage regulators to provide the necessary voltages. The input for the ADC is connected to a transformer input which can be connected to a 50 ohm single ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. The onboard LMK04828 can be used to generate the necessary JESD204B clocks.

Evaluation Module Features:

  • Single 1.8V supply to simplify power requirements
  • Flexible input clock buffer with 1/2/4 divider to simplify clocking
  • On chip dither to improve SFDR
  • JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
  • Supports subclasses 0,1,2 for synchronization and compatibility
  • Pin compatibility with 12/14b and dual/quad devices

ADC34J22IRGZ25 - Request More Info about ADC34J22IRGZ25

Features

  • 12-Bit Resolution
  • SNR = 69.6 dBFS, SFDR = 86 dBc at fIN = 70 MHz
  • Ultra-Low Power Consumption:
    • 203 mW/Ch at 160 MSPS
  • JESD204B Serial Interface:
    • Subclass 0, 1, 2 Compliant up to 3.2 Gbps
  • Pin-to-Pin Compatible with 14-Bit Version

Evaluation Module:

The ADC34J22 EVM demonstrates the performance of a low power quad 50Msps 12 bit ADC. It includes the ADC34J22 device, LMK04828 JESD204B clocking solution and TI voltage regulators to provide the necessary voltages. The input for the ADC is connected to a transformer input which can be connected to a 50 ohm single ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. The onboard LMK04828 can be used to generate the necessary JESD204B clocks.

Evaluation Module Features:

  • Single 1.8V supply to simplify power requirements
  • Flexible input clock buffer with 1/2/4 divider to simplify clocking
  • On chip dither to improve SFDR
  • JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
  • Supports subclasses 0,1,2 for synchronization and compatibility
  • Pin compatibility with 12/14 bit and dual/quad devices

ADC34J45IRGZ25 - See ADC34J45IRGZ25 Details

Features:

  • 14-Bit Resolution
  • SNR = 72 dBFS, SFDR = 86 dBc at fIN = 70 MHz
  • Ultra-Low Power Consumption:
    • 203 mW/Ch at 160 MSPS
  • JESD204B Serial Interface:
    • Supports Subclass 0, 1, 2
  • Pin-to-Pin Compatible with 12-Bit Version

Evaluation Module:

The ADC34J45 EVM demonstrates the performance of a low power quad 160Msps 14 bit ADC. It includes the ADC34J45 device, LMK04828 JESD204B clocking solution and TI voltage regulators to provide the necessary voltages. The input for the ADC is connected to a transformer input which can be connected to a 50 ohm single ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. The onboard LMK04828 can be used to generate the necessary JESD204B clocks.

Evaluation Module Features:

  • Single 1.8V supply to simplify power requirements
  • Flexible input clock buffer with 1/2/4 divider to simplify clocking
  • On chip dither to improve SFDR
  • JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
  • Supports subclasses 0,1,2 for synchronization and compatibility
  • Pin compatibility with 12/14b and dual/quad devices

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